1. Field of the Invention
The present invention relates to a semiconductor device, which mounts semiconductor chips or the like thereon, and is coupled to interconnect line substrates or the like, and a method for manufacturing same, and also relates to a thin plate interconnect line member employed for the semiconductor device.
2. Description of the Related Art
Portable electronics products such as cellular phone, PDA, DVC, DSC or the like acquire multi-functions in an accelerating speed, and in such condition the miniaturization and the weight reduction is essential for these products to be accepted by the market, and thus LSI having higher integration level are necessary to satisfy these needs. On the other hand, more user-friendly and convenient products are also desired for these electronics products by the market, and thus LSI having multiple functions and higher performances are needed for utilizing these products. In this reason, number of I/O increases as the level of the integration of LSI increases, while the requirement for miniaturizing the package itself becomes considerable. In order to combine these two requirements into one product, developments of the semiconductor packaging, which is applicable for mounting the semiconductor devices at higher density of devices, is strongly demanded. To address these requirements, various developments in the packaging technology called “chip size packaging” or “chip scale packaging” (CSP) are actively conducted.
One of known examples of these packaging may be “ball grid array” (BGA). BGA is made by the method, in which semiconductor chips are mounted on a substrate for packaging, and after the substrate is molded with a resin, solder balls are formed on an opposite surface thereof at area array positioning for utilizing them as external terminals. BGA comprises a mounting area that is a plane shape, and thus it is possible to relatively-easily achieve the miniaturization of the package. Further, the circuit substrate of the BGA is not necessary to adopt to a narrow-pitch specification, and higher precision for the mounting technology is not required for BGA, and consequently total cost for mounting the devices thereon can be reduced by employing BGA, even if the cost of the package itself is rather higher.
FIG. 1 is a diagram of a BGA, showing a schematic structure of a general BGA. BGA 100 comprises a structure, in which a LSI chip 102 is mounted on a glass epoxy substrate 106 via an adhesive layer 108. The LSI chip 102 is molded with a sealant resin 110. The LSI chip 102 is electrically coupled to the glass epoxy substrate 106 via a metal line 104. Solder balls 112 are disposed at an array arrangement on the backside of the glass epoxy substrate 106. The BGA 100 is mounted on a printed board via the solder balls 112.
An example of other type of CSP is described in JP-A-2002-94,247. More specifically, JP-A-2002-94,247 discloses a system-in package having an LSI for high frequency on board. A multi-layer interconnect line structure is formed on a base substrate in this package, and circuit devices such as LSI for high frequency or the like are formed thereon. The multi-layer interconnect line structure comprises a structure, in which a core substrate, a copper leaf with a resin or the like forms a laminate structure.
However, it is still difficult to achieve the levels of miniaturization, the reduction of the thickness and the reduction of the weight of the package that are currently desired in the market of the portable electronics products or the like, by employing the conventional CSP. This is because the conventional CSP includes the substrate for supporting the chips. The existence of the support substrate increases the thickness of the entire package, and thus the miniaturization and the reduction of the thickness and the weight of the package is limited. Further, this also adversely limits the improvement on the heat dissipation ability thereof.
In view of these situations, the present invention provides a solution to the above-mentioned problems, and it is an object of the present invention to provide a low-profile and light-weight semiconductor device having improved product reliability and improved high frequency performance.